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Altera_Forum
Honored Contributor I
1,458 Views

regarding avalon interface

Hi all, 

I have a slave from which I want to read data and write data into it using Nios II processor as a master. Can anyone explain me how to use signal "address lines" of avalon mm interface to read and write data from slave? :confused: 

Please provide example if possible. 

Thank you.:)
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4 Replies
Altera_Forum
Honored Contributor I
51 Views

Hallo Avani27 

 

A computer has an adress and a data bus that links the CPU to the RAM memory. 

 

Adress lines of the avalon MM are the lines that adress wich byte from the RAM (in FPGA or outside of FPGA) needs to be written or read by the processor. The data lines transport the data between the processor and the memory. Avalon refers to the general concept, the architecture that makes things work. 

 

For examples you can refer to the altera universty web site, there several nios examples are provided you might consider 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/tt/tt_my_first_nios_sw.pd...  

 

Best Regards en welcome to the forum. 

 

Johi.
Altera_Forum
Honored Contributor I
51 Views

Hello Johi 

Thank you so much for the reply. but I am confused about use of address lines because my slave is not a memory. It is a sequence detector and it has master slave interface with Nios II Processor.
Altera_Forum
Honored Contributor I
51 Views

It doesn't matter whether it's an actual memory or not. Every slave component has at least one addressable location (the "base address" you set in Qsys) that is used for data transfer (like a memory) or for reading or writing control or status registers. I don't know what your sequence detector does (custom IP?), but you access it from the Nios either with a hardware address or using the macros created through the use of the Nios software build tools (the system.h header created based off of the Qsys-generated .sopcinfo file).

Altera_Forum
Honored Contributor I
51 Views

Thank you so much sstrell. It helped me a lot. :)

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