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Altera Quartus II ROM megafunction? Cyclone IV E

Altera_Forum
Honored Contributor II
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Hey guys, 

 

I've got a Cyclone IV FPGA development board with a VGA socket on. I've written a simple VGA sketch to get all the timings working and I'm now coming to implementing a ROM to display a small image on my VGA monitor. The image is only 100x75 (800>>3 and 600>>3) so not too much memory is used. The problem is however, the ROM block doesn't seem to be compiling into my code! I've created my VGA controller in VHDL routing the address and data lanes as ports and I've connected the megafunction to the VHDL block in a block diagram file. The input of the ROM is clocked by the master clock. Am I missing something specific to include my ROM? 

 

Thanks,
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Altera_Forum
Honored Contributor II
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Can anybody help?

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