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hi, im trying to get myself familiar with altera quartus but there is a few info that i dont understand.
on the compilation report on this fitter summary, im not quite sure what is the total pins means. i realise on one of my project file, it use up 513/622 (82%) i wonder it is so much and what does it means. also , on the timing analyzer summary(classic) what does worst-case tsu, worst-case tco, worst case th means?Link Copied
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--- Quote Start --- hi, im trying to get myself familiar with altera quartus but there is a few info that i dont understand. on the compilation report on this fitter summary, im not quite sure what is the total pins means. i realise on one of my project file, it use up 513/622 (82%) i wonder it is so much and what does it means. also , on the timing analyzer summary(classic) what does worst-case tsu, worst-case tco, worst case th means? --- Quote End --- Hi, the total number of Pins is the number of Pins used by your design. Maybe you have large busses in your design. tSU = <pin to register delay> + <micro setup delay> - <clock to destination register delay> tCO = <clock to source register delay> + <micro clock to output delay> + <register to pin delay> tH = <clock to destination register delay> + <micro hold delay of destination register> - <pin to register delay> For more detailed info look intot the Quartus Help or on the Altera Web site. Kind Regards GPK
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