Arria 10 GX Remote Update Circuitry

[GaryCode]

Hello, 

We are using an 10AX066 FPGA connected to an MT25QU01 flash. It's connected through Active Serial. We are looking to use a system setup that will allow us to boot into a user image, before falling back to a factory image if it fails to configure 3 times, we do not need a watchdog, or the AnF bits. Is the default behaviour of the Arria 10 device to provide the features provided in this flow chat (https://www.intel.com/content/www/us/en/docs/programmable/683461/current/configuration-sequence-in-the-remote.html)? Is the Remote Update IP core necessary for any functions that we want?

[Fakhrul]

Hi GaryCode,

Yes, it seems like you may need the Remote Update Intel FPGA IP. The remote system upgrade circuitry contains the remote system upgrade registers, watchdog timer, and a state machine that controls these components. To answer your question, it's a default component for the Remote system update system. For the watchdog timer, if you do not want this feature in the application configuration, you need to turn off this feature by setting the Wd_en bit to 1'b0 in the update register during factory configuration user mode operation. You cannot disable this feature in the application configuration. Please refer to Intel® Arria® 10 Core Fabric and General Purpose I/Os under 7.4. Remote System Upgrades Using Active Serial Scheme topic.

Regards,

Fakhrul

[Fakhrul]

Please be advised that due to the absence of a response from you regarding the previous notification we provided, we will be transitioning this thread to community support. If you have any new questions or concerns, we kindly suggest opening a new thread to receive assistance from Intel experts. However, if you do not have any further inquiries, the community users will be available to assist you on this thread. Thank you for your understanding.