Arria 10 PTP Implementation using Triple Speed Ethernet IP Core.

[CHatz]

Our board is based on the Arria 10 FPGA. We are using the KSZ 9031 PHY.

We would like to implement PTP (Precision Time Protocol) on the board.

Would the IP Core interface with the KSZ9031 PHY in RGMII mode?

Are there any other issues we should be concerned about with this implementation?

Thank you,

Costas Hatzinikolaou

[ZiYing_Intel]

Hi,

Thanks for submitting the issue.

Please do let me have some time to investigate on your case and I will get back to you with findings.

Best regards,

Zi Ying

[ZiYing_Intel]

Hi,

May I know the product name that you are using (full product name)?

Are you using your own PHY instead of the Arria 10 fpga PHY?

Please do feel free to correct me if I understand your question wrongly.

Best regards,

Zi Ying

[CHatz]

Hi Zi,

We are using the Microchip KSZ9031 PHY. We are not using the Arria 10 PHY.

Going over the HPS Technical Manual, I read that the EMAC HPS peripherals do include the IEEE 1588 Precision Time Protocol clock synchronization. 

So now my question is: Do we need the Intel IP to implement PTP or the existing MAC peripheral will be sufficient?

Thank you,

Costas

[ZiYing_Intel]

Hi Costas,

I would like to suggest you to use the Intel IP as to implement your design as we do have the example design of IP which can let you refer to do some changes according to your desire design.

If you are using external PHY for the triple speed ethernet with RGMII mode, you may refer to link below Section 5.3.1, pg 104, https://www.intel.com/content/www/us/en/docs/programmable/683402/22-1-20-0-0/system-with-mii-gmii-or-rgmii.html

We suggested you to do the changes as the user guide stated so that to prevent any error occur.

Best regards,

Zi Ying

[ZiYing_Intel]

Hi Costas,

Since the case has been idle without further inquiries, I would like to close the case.

If you still have any inquiries after the case closed, please do feel free to submit the another issue.

Best regards,

Zi Ying