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Honored Contributor I

Arria10 - uboot preloader hangs in 'data abort' exception




I try to boot Linux on my custom made arria 10 board. On my board RAM is 

connected to the FPGA directly, and HPS has no access to it using 

default addresses (0x00000000 - 0xbfffffff). It is supposed to use RAM 

using HPS to FPGA bridge (0xc0000000 - 0xfbffffff) and FPGA takes care 

of initializing RAM. 



msel is set so fpga is automatically programmed at the startup from 

qspi. bsel is set to boot from sdcard. 



I've created FPGA project for my board. First error is that when 

generating handoff files, there is no emif.xml (because there is no ram, 

right?), so I've stubbed this file with empty values. Uboot has built 

without error and I managed to boot preloader while being connected via 

jtag. I can step through code, read memory, registers and so on - a 

normal session with GDB. 





And here are the problems: 



uboot code goes into "data abort" exception in 



arch/arm/cpu/armv7/socfpga_arria10/sdram.c:124 int is_sdram_cal_success(void) { return readl(&socfpga_ecc_hmc_base->ddrcalstat); } 


reading socfpga_ecc_hmc_base returns: 



(gdb) p socfpga_ecc_hmc_base $1 = (const struct socfpga_ecc_hmc * const) 0xffcfb000 


So it is a valid pointer to ecc_hmc_ocp_slv_block. BUT, trying to read 

this location gives error: 



(gdb) x/1x 0xffcfb000 Error: data abort at 0xffcfb000, dfsr = 0x00000008 


and it's the end. I can read some other registers (uart0 register) 



(gdb) x/1x 0xFFC02008 0xffc02008: 0x000000c1 


I cannot also read GPIO2 register nor set it to flash a diode. 





Now some questions arises 



1) Can Linux work when RAM is not connected to hsp MMU but to FPGA? 

2) Can bsp-editor generate device tree files without emif.xml? Without 

the file it rises error and refuses to go on (thus creating empty emif.xml) 

3) Why can't I read some peripheral register? More, why uboot can't do 

it and crashes? 



I would appriace any help, any suggestions that could lead me to 

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