Automated Conversion of Xilinx Block Diagram files to Intel Quartus

[ZaidSahawneh]

I have a Xilinx project and am attempting to port the project from a Zynq board to the Stratix 10. I have already updated all Xilinx IP but the project has 2 .bd files that I need to include. 

I don't see any rtl generated by them so I'm assuming Xilinx just interprets them directly. Is there an automated tool I can use to input a Xilinx .bd file and convert it to a .qsys file or something that Quartus can read?

[KennyTan_Altera]

Unfortunately, user will need to follow the documetation https://www.intel.com/content/www/us/en/docs/programmable/683562/17-1/to-fpga-design-conversion.html.

Thanks

[ZaidSahawneh]

I found this thread referencing an automatic tool. Would it be possible to get access to such a tool even if its not a perfect conversion so I can observe its attempt to do so?

https://community.intel.com/t5/Intel-Quartus-Prime-Software/Porting-from-Xilinx-to-Altera/td-p/1365083

[KennyTan_Altera · Accepted solution]

The tools are for internal use only. Based on your requirement, these internal tools cannot convert block diagram files to Quartus. They can only convert Verilog/VHDL files. Additionally, an agreement must be signed before we can assist you with the conversion.

[ZaidSahawneh]

Okay then. I will continue working on this manually. Thank you for the help links. If I come across any specific issues I'll open a new thread.