I am porting a IP originally designed for Xilinx device to Intel FPGA. It needs a Avalon-ST to GMII (receiving path) adapter, so the data can be sent through Avalon-ST. Is there any example design for this? Thanks......
You can search for Example design on our website.
I can point you to one of RGMII/ SGMII reference design see if this is helpful for you.