Avalon streaming interface in HLS component can't connect to streams in streaming_dma_afu example.

[RBash]

Hi,

I'm trying to use the streaming_dma_afu included in the samples that come with Arria 10 cards, and replace the pattern checker and pattern generator modules with a simple HLS module. I'm using i++ Version 17.1.0 Build 240 and Quartus Version 17.1.1 Build 273, and my OS is CentOS Linux release 7.6.1810.

The HLS code is the following:

component void st_add(stream_in<unsigned int, usesPackets<true>, usesValid<true> > &in_st, stream_out<unsigned int, usesPackets<true>, usesReady<true> > &out_st, hls_stable_argument hls_avalon_slave_register_argument unsigned int offset) { for(unsigned int i = 0; i < 100; ++i) { unsigned int in = in_st.read(); out_st.write(in + offset); } }

After compiling the above code and using the IP generated by it in the Platform Designer system in the streaming_dma_afu example, I face the following errors:

Error: streaming_dma_test_system.m2s_dma_bbb.m2s_st_source/st_add_internal_0.in_st: m2s_dma_bbb.m2s_st_source has its first symbol in the high-order bit positions, but st_add_internal_0.in_st does not. Error: streaming_dma_test_system.st_add_internal_0.out_st/s2m_dma_bbb.s2m_st_sink: s2m_dma_bbb.s2m_st_sink has its first symbol in the high-order bit positions, but st_add_internal_0.out_st does not.

I can make these errors go away by checking the "First Symbol in High-Order Bits" box in the Signals & Interfaces tab under Component Instantiation tab in Platform Designer. However, when I want to generate HDL code for the system I get these errors:

Error: avalon_st_adapter.data_format_adapter_0: Unsupported adaptation: The input interface uses the empty signal. However, the output interface is not using the empty signal. Error: avalon_st_adapter.data_format_adapter_0: "Data Symbols Per Beat" (inSymbolsPerBeat) 64 is out of range: 1-32 Error: avalon_st_adapter_001.data_format_adapter_0: "Data Symbols Per Beat" (outSymbolsPerBeat) 64 is out of range: 1-32 Error: qsys-generate failed with exit code 1: 3 Errors, 26 Warnings

So my questions are:

1. Does changing "First Symbol in High-Order Bits" from Platform Designer affect the correct functionality of the system when a different option was specified in the IP itself?
2. How can I fix the errors regarding empty signal and Data Symbols Per Beat for streams?
3. Could these errors be due to the version of Quartus I'm using? I also know that HLS isn't supported on the OS that I'm using, but since the code compiled successfully I wanted to give it a try. Could this fact (lack of support for HLS on CentOS 7.6) be the cause of the errors?

Thanks in advance for your help.

[KhaiChein_Y_Intel]

Hi,

May I request the example and steps to reproduce the error?

Thanks.

[KhaiChein_Y_Intel]

Hi,

May I know if you have any updates?

Thanks.

[RBash]

Hi,

Yes, the problem was solved by using a sample code for generating AFU using an HLS component.

Thanks

[KhaiChein_Y_Intel]

Hi,

Thanks for the update. I believe your feedback is valuable to other customers.

Thanks.

[ahaa]

May I know where could I get the example code of hls-afu?

Thanks very much!