Hi,I am trying to boot a nios processor from external qspi flash. I have added a nios and qspi flash ip to my project, set the reset vector of the nios to the base address of the qspi and set the exception address to a region in my ddr2. I have validated the nios and qspi flash are working by booting the nios from on chip ram and performing read/write/erase/get info operations on the qspi. I set up my nios eds hal.linker and linker script as per an730 for both execute in place in qspi and copy from qspi to ddr (I have attempted both). I compile the project, use mem_init_generate to create a .hex file and use objcopy to create a .bin file and program that into my qspi, when I try to boot the nios nothing happens. I can use the eds to program the nios and start it running from qspi, when I read out and compare the qspi memory I notice that the .bin file starts at address 0x0 in the qspi address range but when the eds runs it the program starts at address 0x20. I try programming my .bin file so it starts at offset 0x20 but this doesnt boot either. the 0x20 seems to be from the reset region of the qspi being 32 bytes. The first 32 bytes are all 0xFF and I am half wondering if when the boot copier gets programmed in, then the application get programmed the block is being erased (erasing the boot copier) before the application is written in. In my attempts to get something working I followed the AN730 and generated a .pof using the .hex file (including the quartus.ini with PGMIO_SWAP_HEX_BYTE_DATA=ON in my project folder) I then used the parallel flash loader to load the pof into qspi and try to run it and it still doesnt boot up. When I read out the .pof programmed qspi region it very closely matches the format of the .bin file generated by converting the .hex with objcopy which leads me to think I am on the correct path. Even if I get the nios to boot using the pfl the idea is I want to be able to remotely upgrade the nios code and I wont be using the quartus programmer to program the pfl etc etc I am nearly stuck and feel it is very close to just working but I am missing something. Has anyone else gone through similar pain and found a solution? Any help/input would be appreciated! Thanks James
Hi,Yes I have checked and double checked the settings in AN730, I am using a max10 and an n25q128 qspi. I have tried both option 4 and 5 with the nios booting from qspi and executing in place and copying to ddr. After more investigation I think I am running into: https://www.altera.com/support/support-resources/knowledge-base/solutions/rd03172015_883.html Where as the nios I am using is a nios/e and the qspi is in a seperate clock domain it doesnt boot. I am trying to find a workaround without having to buy the nios/f license. The example design I looked at from rocketboards (Altera MAX10 10M50 Rev C Development Kit Linux Setup (althought I am not trying to boot linux)) uses the qspi as the boot device but has a nios/f core. I am using quartus 15.1 so I might give the latest quartus a go in case it has been fixed in a later version.