Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21618 Discussions

Building Embedded System for DE2-115 Board

Altera_Forum
Honored Contributor II
1,435 Views

I am looking to build a embedded system with the DE2-115 board that includes: 

 

 

Custom Logic interfaced to Avalon PIO 

Nios II e 

JTAG UART 

RS-232 UART 

LEDs/Switches/Buttons via Avalon PIO 

Character LCD 

 

I wanted to take advantage of the Terasic System Builder that automatically generates the top level design files and pin assignments for the DE2-115. This creates the files, 

 

Quartus II Project file (.qpf) 

Quartus II Setting File (.qsf) 

Top-Level Design File (.v) 

Synopsis Design Constraints file (.sdc) 

Pin Assignment Document (.htm) 

 

Once I create the system I open it up in Quartus II. Now I am not sure of the next step. Should I run SOPC builder to establish the various peripherals? Once this is finished how do i link the SOPC builder file with the Quartus II project file to create a .sof ready for NIOS and C code development?
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
606 Views

You are correct, the next step for the system you're interested in is to run the system builder. 

 

The newest version of Quartus has actually moved from the SOPC builder to the QSYS builder, but you can use either. 

 

When you create a system design file by launching qsys or sopc builder from Quartus, save it and run the generation, the design will automatically be linked into your Quartus project. You can then instantiate a module that connects the system to the inputs and outputs in your top level design file. 

 

Once that is done, normal quartus compilation will produce the .sof 

 

To do C development one usually launches the integrated eclipse environment from QSYS or SOPC builder. 

 

I strongly suggest you read the attached PDF as it outlines much of this process. Though you can skip a bit of it since your top level design file and pin assignments have already been automatically generated.
0 Kudos
Reply