C2H optimization design example

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

C2H optimization design example

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Altera has a productivity tool called Nios II C-to-Hardware (C2H) Acceleration Compiler that automates the building and integration of hardware accelerators for Nios II processor-based systems. Like any compiler, the quality of results produced by C2H depend upon the source code input. As C2H generates custom acceleration hardware, small changes in coding style have a more significant effect for C2H compared with software processing.

This document describes the process of accelerating C code with C2H and optimizing the results.

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