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Altera_Forum
Honored Contributor I
1,105 Views

CHANGE_EDREG JTAG instruction via a JAM file

AN357 mentions the ability to test the CRAM CRC error detection circuitry by passing a CHANGE_EDREG JTAG instruction via a JAM file. Anyone knows where I can find more details on the implementation of this?

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5 Replies
Altera_Forum
Honored Contributor I
51 Views

You can use the JAM file below. 

 

Using the JAM file, modify line# 9 to an arbitrary number. This is to change the CRC checksum value.  

DRSCAN 32, $FFFFFFFF; 

 

This will overwrite the CRC checksum in the Storage Register through CHANGE_EDRED instruction.  

CRCERROR pin will then go high, signaling a CRC error.  

 

 

--Jam file-- 

 

NOTE MAX_FREQ "10000000"; 

ACTION CONFIG_IO = EXECUTE; 

PROCEDURE EXECUTE; 

BOOLEAN X = 0; 

DRSTOP IDLE; 

IRSTOP IDLE; 

STATE IDLE; 

IRSCAN 10, $015; 

DRSCAN 32, $FFFFFFFF; 

STATE IDLE; 

EXIT 0; 

ENDPROC;
Altera_Forum
Honored Contributor I
51 Views

Hi, 

I'm trying to generate .jam file to modify CRC checksum with the following file : 

 

crc_error.jam 

--------------------- 

NOTE "DEVICE" "EP2S30"; 

NOTE MAX_FREQ "10000000"; 

ACTION CONFIG_IO = EXECUTE; 

PROCEDURE EXECUTE; 

BOOLEAN X = 0; 

DRSTOP IDLE; 

IRSTOP IDLE; 

STATE IDLE; 

IRSCAN 10, $015; 

DRSCAN 32, $FFFFFFFF; 

STATE IDLE; 

EXIT 0; 

ENDPROC; 

' END OF FILE 

CRC 19a6; 

--------------------- 

 

Quartus II Programmer send back the following message style for the previous crc_error.jam file and from the generated Quartus II MyFGPA.jam file (generated from .sof) :  

"Error : programming error : multiple files specified for Programmer" 

 

The JAM player doesn't support DO_PROGRAM or PROGRAM action for the crc_error.jam file 

 

My configuration is built as follow : 

- Stratix II EP2S30 with EPCS64 

- .JIC file built from .SOF file 

 

How can I generate properly .JAM file for EP2S30 and which software can I use to change CRC value on Stratix EP2s30 ? 

 

Thanks a lot
Altera_Forum
Honored Contributor I
51 Views

Hello, 

 

This jam file is generated outside of Quartus so you will have to use the Quartus_jli.exe utility in your Quartus install directory or use the jam player. You can download the Jam player at the link below. 

 

https://www.altera.com/support/software/download/programming/jam/dnl-player.jsp 

 

Action program or configure are not available for this file. The action for this file is CONFIG_IO. 

 

Good luck!
Altera_Forum
Honored Contributor I
51 Views

I struggled finding info on this topic and on STAPL anywhere on the web. I created a STAPL program that works for me on Cyclone IV and wanted to share. 

 

NOTE "CREATOR" "Manually Created"; NOTE "DATE" "12 Feb 2018"; NOTE "STAPL_VERSION" "JESD71"; NOTE "ALG_VERSION" "1"; NOTE "DEVICE" "EP4CE22"; NOTE "CHECKSUM" "UNSPECIFIED"; NOTE "IDCODE" "00000000"; NOTE "USERCODE" "UNSPECIFIED"; NOTE "TARGET" "UNSPECIFIED"; NOTE "STACK_DEPTH" "4"; NOTE "MAX_FREQ" "1000000"; ACTION SIM_CRAM_ERROR = DO_CRC_REG_WRITE, PRINT_CAPTURE_RESULT; ACTION SIM_CRAM_ERROR_AND_RESET = DO_CRC_REG_WRITE, PRINT_CAPTURE_RESULT, DO_CRC_REG_RESTORE; DATA globalVariables; BOOLEAN originalRegisterValue =$FFFFFFFF; BOOLEAN instCode_CHANGE_EDREG = $015; ENDDATA; PROCEDURE DO_CRC_REG_WRITE USES globalVariables; Print "Writing 0xFFFFFFFF to 32-bit CRC storage register."; DRSTOP IDLE; IRSTOP IDLE; STATE RESET; IRSCAN 10, instCode_CHANGE_EDREG; DRSCAN 32, originalRegisterValue, CAPTURE originalRegisterValue; STATE IDLE; ENDPROC; PROCEDURE DO_CRC_REG_RESTORE USES globalVariables; Print "Restoring original value to 32-bit CRC storage register after 1 sec wait."; WAIT 1000000 USEC; DRSTOP IDLE; IRSTOP IDLE; STATE RESET; IRSCAN 10, $015; DRSCAN 32, originalRegisterValue, CAPTURE originalRegisterValue; STATE IDLE; ENDPROC; PROCEDURE PRINT_CAPTURE_RESULT USES globalVariables; Print "Original value = ", originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue, originalRegisterValue; ENDPROC; 'END OF FILE
YDeal
Beginner
51 Views

Hi,

 

I use the following JAM code in order to simulate CRC error on MAX10:

 

'EDCRC_ERROR_INJECT

 

ACTION ERROR_INJECT = EXECUTE;

DATA DEVICE_DATA;

BOOLEAN out[32]= $00000000;

BOOLEAN in[32] = $FFFFFFFF;  'shift in any wrong CRC value

ENDDATA;

PROCEDURE EXECUTE USES DEVICE_DATA;

BOOLEAN X = 0;

DRSTOP IDLE;

IRSTOP IDLE;

STATE IDLE;

IRSCAN 16, $015;   'shift in CHANGE_EDREG instruction

WAIT IDLE, 10 CYCLES, 50 USEC, IDLE;

DRSCAN 32, in[31..0], CAPTURE out[31..0];

WAIT IDLE, 10 CYCLES, 50 USEC, IDLE;

PRINT " ";

PRINT "Data read out from the Storage Register: ",out[31], out[30], out[29], out[28], out[27],out[26], out[25], out[24], out[23], out[22], out[21], out[20], out[19], out[18], out[17], out[16], out[15], out[14], out[13], out[12], out[11], out[10], out[9], out[8], out[7], out[6], out[5], out[4], out[3],out[2], out[1], out[0];   'Read out correct precomputed CRC value

PRINT " ";

STATE IDLE;

EXIT 0;

ENDPROC;

 

The IRSCAN value is 16 because I have 2 components on JTAG chain (XIlinx + MAX10)

 

 

The error is corectly detected but if i do the same code twice, I not read the CRC that i Write the previous iteration.

 

If I write 0xFFFFFFFF, I read 0xFFFFFFFE during the next iteration.

 

In fact, I just want the write the correct CRC, the CRC read at the first time after power on in order to return in good state without CRC error.

 

 

Can you help me please.