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Hello friends,
Pse forgive such dumb question. I build myself a small PCB for EPM3064ACT100-4 for playing around. I downloaded Quartus II 9.0, place in schematic a 7490 counter, define 1 CPLD pin as input connected to CLKA and 1 for output connected to QA. Having some experience on old fashion logic, I wired 7490 other pins to work :) so I expect to inject some MHz on In and see with scope f/2 on out :) (asumming I figure out all required CPLD settings) Now the question is CPLD needs itself clock, or is just static - after programing I use'it as a bunch of logics "software glued" in project. Tnx in advance, Richard,Link Copied
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that depends upon your design
if you have only combinatorial logic and no register, then you can go without a clock. if you have counters, and they are done with registers, then you need a clock.
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