CRC_ERROR of Cyclone IV E device

[weid]

Hi,

My design use Cyclone IV E device with Nios as processer, the board be used on power plant as control board.

Until now, we have near 10000 pcs board used on power plant.

From February to now, about 4 months, we get 5 pcs modules(fpga) reboot due to CRC_ERROR signal active.

And, due to it is very dangerous if our board reboot on power plant, it will cause something, such like: 4-20mA output board will lost current output, and AI, TC, RTD module will lost input measurement.

So, now, we are considering about how to avoid this cause.

There are several question about this, please helps review them.

1- 10000pcs modules be used, 4 months,5 modules reboot due to CRC_ERROR, is it normal? Whether the odds are a little bit high.

2- Could you helps to check whether my understanding is right: Cyclone IV E device only check the configured CRAM zone, for unused zone of device, CRC will don't check them. For example, my project use 30% FPGA CRAM, then, CRC check function only check this 30% part, rest 70% will not be CRC ckeck.

3- Is it possible the CRC_ERROR signal of Cyclone IV E device has mistake active case exist. My means is some times CRC_ERROR active mistakenly even there is no CRC fault for CRAM. Our other designing use Arria II series FPGA, we get information that the CRC_ERROR of this FPGA will active sometimes mistakenly. If this case exist, how we solve it.

4-If we disable the CRC check function in Quartus tools, don't use it, what will happen if CRAM bit fault, whether it will cause my logic generate a fault result. If it will, looks we can't just disable this funciton.

Very thanks.

Weidong

[ShafiqY_Intel]

Hi Weidong,

1- Based on my observation, 5 out of 10000 pcs (0.05%) is consider normal.

2- CRC only check FPGA configuration bits, which mean only 30% of your CRAM is checked.

3- I have not face the problem where CRC_ERROR will active sometimes mistakenly. CRC_ERROR only active if CRC valus do not match with pre-computed CRC.

• When a data frame is loaded into the FPGA during configuration, the pre-computed CRC value shifts into the CRC circuitry in the FPGA. At the same time, the CRC engine in the FPGA computes the CRC value for the data frame received, and stores the CRC value into the configuration RAM (CRAM). The pre-computed CRC value is compared against the CRC value computed by the CRC engine. If the CRC values do not match, nSTATUS is set low to flag a configuration error. 

4- If CRAM bit fault, your logic generate and design will not behave as you expected (fault result).

Thanks.😉

[weid]

hi, very thanks for your reply.

Could i check one item with you again about your point 3.

You means that "i have face" or "i have not face" the problem CRC_ERROR will active sometimes mistakenly? do you know that whether clyone 4 e device have this case(no CRAM fault but CRC_ERROE active) also.

[ShafiqY_Intel]

I'm sorry for typo. I means "I have not face".