Can I exchange the positive signal (p) and negative (n) signal of LVDS?

[Altera_Forum]

Can I exchange the positive signal (p) and negative (n) signal of LVDS in Cyclone devices? In order to avoid the use of vias.

[Altera_Forum]

Yes.  

Of course, you need to negate the signal inside your design.  Important notice: you can't put the inversion between a DDRIO (or ALTLVDS primitive, which uses DDRIO) and the pin. So, if you're planing to use DDRIO or ALTLVDS, beware of that inversion.

[Altera_Forum]

Thanks for your help.  

Is the LVDS clock signal can also be inverted inside the FPGA?

[Altera_Forum]

--- Quote Start ---  Is the LVDS clock signal can also be inverted inside the FPGA?  --- Quote End ---   You have to apply a phase shift. In my opinion, inverting the signals is good to fix layout errors, but I won't use it as regular design means.

[Altera_Forum]

Extremely grateful.