Hi Guys,
The board is the Alterra's 3C120 Development Kit.
Sympthom:
There is the DDR2 bottom used. As I addedd the 8 LEDs I got the error message at Fitter running:
Error: Cannot place pin ddr2bot_dq[0] to location AG22
Error: Can't place VREF pin AC18 (VREFGROUP_B4_N1) for pin ddr2bot_dq[0] of type bi-directional with SSTL-18 Class I I/O standard at location AG22
Error: Too many output and bidirectional pins per VCCIO and ground pair in
I/O bank 4 when the VREF pin AC18 (VREFGROUP_B4_N1) is used on device EP3C120F780C7 -- no more than 9 output/bidirectional pins within 12 consecutive pads are allowed when the voltage reference pins are driving in, but there are potentially 10 pins driving out
LEDs get 1.8 V while DDR2 gets SSTL -18 Class 1.
I/O Max toggle frq. is applied to LEDs (0 Mhz)
Anyway, the arrangement of outputs is standard, I use it in several designs, and I remember that sometimes I got the same error message and I could fix it somehow... with some setting or assignment setting, but now
i simply don't remember what was the solution:-)) I'm getting old or totaly swamped...
So please provide me a solution if you can. Thank you much in advance!
