Code in architecture outside a process

[Altera_Forum]

Hello, 

 i've seen in many places code in an architecture out of any process, but i can't make it work:  ..... begin  -------------------------------- ---- Component map --------------------------------  if nreset= '0' then   flagimagready <= '0';  Pixelactual<="0001100";  iteracionestmp <= iteraciones;   step <="00";   Elsif Pixelactual>"1001110" then    Pixelactual<=(OTHERS=>'0'); flagimagready <= '1';  Suma1Step<=(OTHERS=>'0'); Suma2Step<=(OTHERS=>'0'); Suma3Step<=(OTHERS=>'0');  End if;  returns:  error (10500): vhdl syntax error at cnn.vhd(377) near text "if"; expecting "end", or "(", or an identifier ("if" is a reserved keyword), or a concurrent statement error (10500): vhdl syntax error at cnn.vhd(384) near text "elsif"; expecting "end", or "(", or an identifier ("elsif" is a reserved keyword), or a concurrent statement error (10500): vhdl syntax error at cnn.vhd(416) near text "if"; expecting ";", or an identifier ("if" is a reserved keyword), or "architecture" (If I include this code inside a process there is no error)   The fact is i need this since is a continous code that doesn't need to be triggered by any signal, it iteretively evolves but after the initialisation (if's) will be independent of any input.

[Altera_Forum]

seems to me that it makes more sense if these assignments are put under a process (with "nreset" and "Pixelactual" inside sensitivity list).

[Altera_Forum]

--- Quote Start ---  seems to me that it makes more sense if these assignments are put under a process (with "nreset" and "Pixelactual" inside sensitivity list).  --- Quote End ---     Well it's more than that, i can't post my code, but pixelactual modifies inside what leads to an infinite loop... I'm not creating a sensibility list, cause there is not need of external info, is a treatment of an array and outputting the results, no extra info is needed, no timing info is needed (the fpga should output as fast as it can), so there is no need of sesitivity list. (i don't mind a process with no sesnitivity list but it did not work for me, to take this solution give me an example, cause i've seen codes out of any process so I prefer that solution.)

[Altera_Forum]

A great manual/tutorial of sensitivity list or waits will do this time anyway, eh!!

[Altera_Forum]

instead of thinking in VHDL - I suggest you try and draw the circuit you want on paper first. VHDL is a description language, so without knowing what the circuit shall be, you cant write the VHDL.

[Altera_Forum]

--- Quote Start ---  instead of thinking in VHDL - I suggest you try and draw the circuit you want on paper first. VHDL is a description language, so without knowing what the circuit shall be, you cant write the VHDL.  --- Quote End ---    I'll take it, but this won't make the process have more inputs, i think i can rewrite the code making the counters come as an external input by the use of flags, but is fitting the code to have process, not using the process for the code...

[Altera_Forum]

counters should only be made inside syncrhonous processes.  

But there is nothing wrong with an asynchronous process. every line of code outside a process is really just a process sensitve to all the signals on the RHS.

[Altera_Forum]

--- Quote Start ---  counters should only be made inside syncrhonous processes.  But there is nothing wrong with an asynchronous process. every line of code outside a process is really just a process sensitve to all the signals on the RHS.  --- Quote End ---    The problem is i don't know why my current code freezes, without a sensibility list will enter allways, thats because you told me to draw the structure.

[Altera_Forum]

It would be easier to see with the actual code. But from your origional post, you cannot have if..then..else outside of a process. You will need to put a process around the code and put iteraciones, nreset and Pixelactual in the sensitivity list. You also MUST have a else case if you want to avoid latches.

[Altera_Forum]

A great manual/tutorial of sensitivity list or waits will do this time anyway