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Compilation error in pipemult project.

MRavi1
Beginner
865 Views

Untitled.pngError (275021): Illegal wire or bus name " " of type signal 

Error (12153): Can't elaborate top-level user hierarchy

Error: Quartus Prime Analysis & Synthesis was unsuccessful. 2 errors, 2 warnings

 

Can anyone please help me understand what exactly I should do to rectify it?

0 Kudos
5 Replies
Vicky1
Employee
570 Views

Hi,

Check the connections of clock,wren(need to be wire) of ram instance & PRN, CLRN should connect inputs using pin tool.

please let me know if you have any different concern.

Regards,

Vicky

MRavi1
Beginner
570 Views
sstrell
Honored Contributor III
570 Views

Just to explain a bit clearer, you have clock and wren connected as busses (thick lines) instead of individual wires (thin lines). Delete the busses and use the wire tool to make the connections. Also, the reset input into the register (CLRN) should be hooked up as well, either to an I/O pin or perhaps even just pulled high.

 

#iwork4intel

MRavi1
Beginner
570 Views

Yes. I tried that too, I just had some problems with installation. Once I re-installed the software it worked fine. Thanks !

NSola3
Beginner
569 Views

Can you share the source codes files for this or link for the same?

 

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