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Compiling a DPC++ code for FPGA

leilag
Novice
225 Views

Hello,

 

I am not sure if this is a right place to post my question. Please let me know if I need to move it to other forums.

I have a code that runs on intel's GPUs and CPUs and I would like to compile it for Intel's FPGAs.

This code has two source codes. Here is the Makefile:

CXX := dpcpp
CXXFLAGS = -O2 -g -std=c++17
SRC := shallow_unroll.dpcpp_buf.cpp wtime.cpp
.PHONY: fpga_emu run_emu clean 
fpga_emu: swm_dpcpp_buf.fpga_emu
hw: swm_dpcpp_buf.fpga
report: swm_dpcpp_buf_report.a
swm_dpcpp_buf.fpga_emu: $(SRC)
	$(CXX) $(CXXFLAGS) -fintelfpga $^ -o $@ -DFPGA_EMULATOR=1
a.o: $(SRC)
	$(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1
swm_dpcpp_buf.fpga: a.o
	$(CXX) $(CXXFLAGS) -fintelfpga $^ -o $@ -Xshardware
run_emu: swm_dpcpp_buf.fpga_emu
	./swm_dpcpp_buf.fpga_emu
run_hw: swm_dpcpp_buf.fpga
	./swm_dpcpp_buf.fpga
dev.o: $(SRC)
	$(CXX) $(CXXFLAGS) -fintelfpga -c $^ -o $@ -DFPGA=1
swm_dpcpp_buf_report.a: dev.o
	$(CXX) $(CXXFLAGS) -fintelfpga -fsycl-link $^ -o $@ -Xshardware
clean:
	rm -rf *.o *.d *.out *.mon *.emu *.aocr *.aoco *.prj *.fpga_emu *.fpga_emu_buffers swm_dpcpp_buf.fpga  *.a

and here is the error:

Device: Intel(R) FPGA Emulation Device
terminate called after throwing an instance of 'cl::sycl::runtime_error'
  what():  Native API failed. Native API returns: -42 (CL_INVALID_BINARY) -42 (CL_INVALID_BINARY)
Aborted

 

I copied and modified this Makefile from one of the Intel DevCloud's examples in this path:
/oneAPI-samples/DirectProgramming/DPC++/DenseLinearAlgebra/vector-add/Makefile.fpga

I can successfully compile the vector-add sample on fpga but can't compile my code. 

 

Could you please take a look and see what I am doing wrong.

 

Thanks,

Leila

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1 Reply
AnilErinch_A_Intel
167 Views

Hi ,

Could you try running your code on the Devcloud by following the thread below

https://community.intel.com/t5/Intel-High-Level-Design/CL-INVALID-BINARY-when-running-fast-recompile...

Thanks and Regards

Anil


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