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Configuration Data Confusion

Altera_Forum
Honored Contributor II
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I'm attempting to design a board for a Cyclone II device. I want to use an EPCS4 

for the configuration data. I've read several Altera documents ("Configuring  

Cyclone II Devices", "Serial Configuration Devices (EPCS1 & EPCS4) Data Sheet")  

but I'm still confused about the different download modes. Could someone briefly  

explain the difference between JTAG and Active Serial modes and the types of  

hardware required for use with the Quartus II 12.0 Programmer.
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Altera_Forum
Honored Contributor II
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Never mind. I found the information I need in previous posts. I should have look before I posted.

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Altera_Forum
Honored Contributor II
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With the JTAG mode you can program the FPGA without using the EPCS chip. It's a volatile configuration. You need reconfigure the FPGA each time you power off the system. With the active serial you just program the EPCS device. After this, this chip configures the FPGA. 

 

The JTAG signals ( TDI, TDO, TCK ) uses diffent pins that uses AS ( DCLK, DATA, ASDI, nCS ). This In all the PCB I draw I put both connectors. 

 

I tied MSEL1,0 to GND with 2 10K pull-down resistors for standard speed Active Serial.
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Altera_Forum
Honored Contributor II
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Thanks for your reply. 

 

The post by dwh@ovro.caltech.edu, August 29, 2012, describes how the configuration data can be downloaded to the serial configuration device via the JTAG.
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