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Hi,
I want to supply a MAX7000 with 5V and have most of the I/O using TTL inputs & outputs. I also want to have 8 bidirectional pins at 3.3v. I see the option in Quartus to set the pin as 3.3v, but does the VCCIO pin for the pins need to be at 3.3v, or is the voltage stepped down internally, so can I supply all of the VCCIO pins with 5v? regards DaveLink Copied
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If the device is to drive a signal out at 3.3V then VCCIO needs to be 3.3V - there's no clever internal step-down if you're powering from 5V.
Since MAX7000 devices only have a single internal VCCIO rail, from which all IO buffers are powered, you'll have to use some external circuitry to do the level shifting. Which way round you do this will depend on your requirements - power the whole thing at 3.3 and step up to 5V with buffers or vice-versa. However, given you're requirement for a bi-directional bus at 3.3V, in the interests of reducing the complexity of controlling the direction of external buffers, I'd be tempted to operate your I/O at 3.3V and use buffers to solve your 5V I/O. Cheers, Alex- Mark as New
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Hi Alex,
thanks a lot for the reply. That info wasn't clear from the datasheet, I was hoping that the VCCIO was segregated between the LABs, rather than a single VCCIO rail. Out of interest, is there another datasheet or product note that describes this better, or did I just misread the info in the MAX7000 datasheet. It looks like I will keep the device at 5v and have an external buffer to do the level shifting for the 8 bit bus regards Dave- Mark as New
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I don't think you misread anything. I referred to the device MAX7000 pinouts - which only refer to "VCCIO". Newer devices, which do have separate I/O banks that can operate at different voltages, refer to "VCCIO1", "VCCIO2"... etc. So, it's just a little experience with the Altera documentation.
Cheers, Alex- Mark as New
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Hi Alex,
OK - thanks, that makes sense regards Dave
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