Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Connecting HPS GPIOs to top level pins

Honored Contributor II

The Qsys defines all HPS GPIOs as bi-directional signals. I have to define the top level IO pins as bi-directional too. Otherwise, it won't allow me to connect them together. However, I got warning messages when compiling the code: 

Warning (13009): TRI or OPNDRN buffers permanently enabled 


and there are a bunch of warnings of 13010 indicating which HPS IO pin has problem.  


Firs question: how to get rid of the warning messages? 


I also got another problem here: the software cannot read the GPIO input signals at gpio_swporta_dr .  

it can only read the inputs at gpio_ext_porta. 


Is this because of the warning message? or reading gpio_ext_porta is the only option for input signals?  


thanks for inputs! 


Qs Xiang
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