Constraining PLL in TimeQuest

[Altera_Forum]

Hello, 

 I was waondering how to use derive_pll_clocks comand in TimeQuset. TimeQuest can't reflect new frequency.  I did...  1.I grenarated SDC File from QSF File. 2.I changed input frequency of PLL in Mega_Wizard. 3.Start Compilation 4.Check PLL Summary in Compilation Report 5.Report said Changed new frequency. but 6.TimeQuest's clock Summary said previous freauency.  "derive_pll_clocks -use_tan_name wrote" in grenarated SDC(I've never changed). and  SDC file not change like that. # Create generated clocks based on PLLs derive_pll_clocks -use_tan_name# ------------------------------------------# Original Clock Setting Name: clk create_clock -period "6.666 ns" \ # <= previous frequency  -name {clk} {clk}# ---------------------------------------------  What sholud I do how to automate reflect new refuecncy from Mega_Wizard?

[Altera_Forum]

Hi wat_arg, 

 You can try the -create_base_clocks option of derive_pll_clocks. With the option, derive_pll_clocks creates the PLL input clock ('clk' in your case) if the clock is not defined. Of course you need to comment out the input clock definition.  Here are the updated SDC constraints:  derive_pll_clock -create_base_clocks  # create_clock -period "6.666 ns" -name {clk} {clk} ;# commented out

[Altera_Forum]

Thank you golgo. I followed your suggestion , 

and reflect new frequsnecy in TimeQuest's clock Summary.  so I have a question. what's meaning of -use_tan_name in derive_pll_clocks Command?  on-line help said -create_base_clocks: Creates base clocks on input clock ports of the design that are feeding the PLL -use_tan_name: Use net names as clock names  I could understand -create_base_clocks, but I couldn't understand -use_tan_name.

[Altera_Forum]

Hi wat_arg, 

 By default, the PLL clock name is the same as the output pin name. However, in Classic Timing Analyzer, the PLL clock name is the same as the net name. By specifying -use_tan_name option to derive_pll_clocks, you can use the net name as the PLL clock name.  For example, when the instance name of the ALTPLL is inst, the c0 clock is set as follows:  without -use_tan_name: inst|altpll_component|auto_generated|pll1|clk[0]  with -use_tan_name: pll:inst|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]

[Altera_Forum]

Thanks golgo, I'll transfer fee to your Swiss bank's account(joke).

[Altera_Forum]

I would actually recommend not having -use_tan_name. It doesn't hurt, but I see it less and less, and always opens the question of "Why did you have that option on?". THe reason it was created was for the QSF2SDC conversion, whereby the user might have another constraint, like Cut Paths, between two clocks in TAN. If TimeQuest gvae the clocks different names, that Cut Paths conversion would no longer match the clock names and be ignored. But if you don't have that situation, go ahead and get rid of that option, or get rid of it and change the names in your set_false_path to reflect the new clock names. You can see the names by double-clicking the task Report Clocks. 

(And this is a really minor suggestion. I'm guessing there will be designs still using that option 10 years from now and having no problems, just pointing out why it's there...)