- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
hello,
I'm working about new project on the Stratix III EP3SE50F780. I can't find the worst case current consumption of each voltage source. I know about the PowerPlay early power estimator but I need the worst case for my LDO design. can anybody help me?:confused: thanks for any help!!Link Copied
2 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
The worst case is difficult to calculate.
i.e. it will be when all FlipFlops and Outputs are toggling at the maximum frequency of your design. This is an unrealistic limit for all designs. So the maximum current for your LDO will depend entirely on your design and clock frequencies etc. I would use the PowerPlay tool and put in the maximum expected values for Toggle rate etc. Either that or put down the biggest regulator you can :)- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Power estimation for FPGAs is not trivial. You're really going to have to put some time into it if you want any reasonable calculation. The PowerPlay estimator is your best bet. You can also use the power estimation spreadsheet that Altera provides.
Jake
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page