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Hi,
I'm looking for a way to take an unknown external clock in the range 1-5MHz and from it generate an internal clock that is exactly four times that external clock. I've been reading various Altera data sheets about PLLs and the altpll megafunction which makes me think this may be possible, but I can't quite make enough sense of it all. My target hardware is Cyclone II or perhaps Cyclone IV (cheap ebay low-end boards running at 50MHz). So first, is this possible? ...if it is, can anyone provide simple guidance as to how I'd do this using Quartus Web Edition? Thanks for taking the time to read this far! -Bob P.S. This is my first post so apologies if I've posted in the wrong place/done anything else I shouldn't have - feel free to correct me if so.コピーされたリンク
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Hi,
External clock in range 1-5MHz is to slow to work for Altera Cyclone II or IV PLL. As I remember Cyclone IV PLL input clock frequency is min 5MHz and Cyclone II - 10MHz.- 新着としてマーク
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As pointed out, 1-5MHz is too slow for an Altera PLL. You'll need a dedicated clock multiplier chip, they are cheap and abundant from multiple sources.
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--- Quote Start --- Hi, External clock in range 1-5MHz is to slow to work for Altera Cyclone II or IV PLL. As I remember Cyclone IV PLL input clock frequency is min 5MHz and Cyclone II - 10MHz. --- Quote End --- Thanks - it's good to have a definitive answer, even though it's not the one I was hoping for :)
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--- Quote Start --- As pointed out, 1-5MHz is too slow for an Altera PLL. You'll need a dedicated clock multiplier chip, they are cheap and abundant from multiple sources. --- Quote End --- Thanks, I'll look into the dedicated chip solution.
