Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

Cyclone II problem

Altera_Forum
Honored Contributor II
1,116 Views

Dear all, 

I am using an EP2C50F672 Cyclone II FPGA and I am facing problems booting it from the EP2C16.  

All connections with MSEL and related config pins of FPGA are as advised in datasheet. 

The problem is that the FPGA will not start reading from the EP2C16. Configuration and Verification of the EP2C16 works fine. 

However, No DCLK is generated from the FPGA at power up and CS won't go down apart from some spurious pulses in the beginning. 

Anyone seen something similar? 

 

Regards, Stefanos
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
443 Views

Please do NOT post the same question in more then one section. 

THis ia a Forum rule. 

 

Thanks. 

 

(See the note I added to the other posting.)
0 Kudos
Reply