Hello!
I'm trying to figure out the basics for how a high speed digital FPGA-based oscilloscope(precisely speaking stroboscope) could be implemented. Analoge bandwidth should of at least a ten GHz (but ADC may be low frequency).
First of all, trigger should be a good analog comparator (comparing digital sample values for determining trigger conditions would not work, because of the low granularity).
Second part is Random Interleaved Sampling(RIS) and it seems to be very tricky.
In order to align the digital samples correctly in time - you would need to accurately know
the time difference between the trigger point and the next sample point (offset). These time intervals could be in the few ps range. Problem even in how to get this offset and sample adc correctly.
I thinking hard about and randomness associated with a trigger. First idea was quadrature sampling of a stable reference clock. Generate sinusoidal waveforms - a sine and a cosine(using CORDIC proccessor in FPGA). If I sample both waveforms at the same time with analog trigger, I get values of sin(x) and cos(x) where x is the phase at the moment of sample. Then extract the phase from these digitized analog values and calculate offset. It seems extreemly complex and doubtfully. Second idea was about using reconfigurable PLL in Stratix II device...
Does anyone have any idea of how RIS could be implemented in FPGA?
