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Cyclone III AS Configuration problem

Altera_Forum
Honored Contributor II
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I have 5 prototype boards, only one of which will configure via an EPCS4 device. Symptoms are: 

 

I can program the FPGA on all boards successfully via JTAG interface 

I can program and verify the contents of the EPCS4 on all boards via the SPI cable interface. 

 

The FPGA I'm using is an EP3C16F484 FPGA 

 

1 board out of 5, the FPGA pulls data from the EPCS4, is configured and starts working - this seems to work reliably, first attempt after power-up, every time 

 

On 4 boards, I see the FPGA pull out the configuration data, but then assert nSTATUS low, and re-try. 

 

'Scoping the first 10-20 bytes of clock/data from the PROM, and the last 10-20bytes, I see no differences between the 'good' and 'bad' systems. 

 

I see no power supply droop on any boards 

 

FPGA MSEL is set to 0010 'Fast Active Serial Standard' 

 

POR looks like 100mS +/- 10mS after power supplies stabilize on all boards 

 

SPI Clock looks to be around 30MHz on all boards 

 

All supplies rise monotonically, and are within a few 10s of mV of the recommended levels 

 

Clock/Data levels look good on the 'scope - tried some pull-ups/caps on one board, but no difference. 

 

 

One board I have replaced the EPCS4 with a Spansion device - this programs from the ByteBlaster cable, and verifies, but the FPGA fails to configure in the same way. 

 

I've run out of ideas - any suggestions ?
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