Cyclone III PLL not locking after reconfig

[Altera_Forum]

I'm using dynamic reconfiguration to change frequencies of a Cyclone PLL. 

I'm using the ALTPLLRECONFIG and ALTPLL IPs. When I load the new parameters and send configupdate I lose lock as expected but never regain lock.  Any ideas why this may occur?  Thanks, Ed

[Altera_Forum]

im in a same situation. follow these links and tell me if you succeed.  

http://www.altera.com/literature/ug/ug_altpll_reconfig.pdf   find this example file  altpll_reconfig_ex1_msim.zip   also follow  http://www.altera.com/literature/ug/ug_altpll.pdf  http://www.altera.com/literature/an/an367.pdf http://www.altera.com/literature/an/an282.pdf http://www.altera.com/literature/an/an454.pdf  please dont forget about me :) if you succeed share your information.

[Altera_Forum]

This can happen on stratix 3 FPGA when the re programmed frequency is too low (Like 5 MHz with an input of 20 MHz).