it's first time I'm here and I have no experience with Intel's FPGA. I just got a project for DE0-Nano dev kit and I just received and processed a SPI communication with other MCU. But now there is a request to design custom board containing FPGA and my part with MCU. I have designed board for EP4CE22E22C6 (same FPGA just package is TQFP-144) with Cypress S25FL128S flash. I changed package and pin configuration to use pins leading out of the package in Quartus 18.1 (Lite).
Now the problem is that I can program the *.sof file to FPGA via JTAG but I am not able to program *.jic file to flash. I'm getting error:
Error (209025): Can't recognize silicon ID for device 1. A device's silicon ID
is different from its JTAG ID. Verify that all cables are securely connected,
select a different device, or check the power on the target system. Make sure
the device pins are connected and configured correctly.
I found that this could be caused by bug which is in version 18.1 till 19.4. I can program the modified project to DE0-Nano so I don't thing that the bug is the problem.
What are requirements to program the project to flash?
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You may take a look at the following KDB which may be applicable to your problem:
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