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Cyclone V: Connecting the HPS EMAC via FPGA fabric IO

S2k
Beginner
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I am having issues meeting timing when bringing an HPS EMAC into the fabric using a Cyclone V device. My project is connected as shown below where I am using the hps_interface_splitter and gmii_to_rgmii_adaptor cores.

 

S2k_0-1659971341812.png

 

 

I have added an 8nS clock constraint to both RGMII_RX_CLK and RGMII_TX_CLK, but when I build the design I am getting large timing violations on the GMII_RX_DATA[7..0] between the HPS EMAC and the fabric register it feeds.

Violations:

S2k_1-1659971341832.png

 

 

 

First failing path shown in “Technology Map viewer” where this is between a fabric register located in the GMII_to_RGMII core and the HPS EMAC:

S2k_2-1659971341837.png

 

 

Same path shown in “Chip planner”:

S2k_3-1659971341850.png

 

 

The big delay that seems to be causing the issue is this 7.614nS, that if I understand correctly is the delay within the HPS? (i.e. nothing to do with fabric timing)

 

S2k_4-1659971341853.png

 

 

Can someone give me any pointers on how I can get this to meet timing please? I am assuming I am doing something inherently wrong here such as have the EMAC incorrectly wired up with the 2 fabric cores.

 

Thanks for any help!

 

 

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