Cyclone V - How to split DDR3 memory for HPS and FPGA?

[Altera_Forum]

Hello everybody, 

 I have an EBV SoCrates Board (Cyclone V) with me.  I want to devide the external DDR3 memory into 3 partiions. One partition for linux/hps, one partition for the fpga and a third 'swap' partition with access from FPGA and linux.  Can anyone please give me a hint where and how to configure it? The icing on the cake would be a working tutorial or a demo project.  Thanks in advance Greetings Guinea

[Altera_Forum]

Try having a look at http://www.rocketboards.org/foswiki/view/projects/myfirstmodule to see an example driver for creating an area of memory in the HPS SDRAM that the FPGA can access via the H2F SDRAM port.

[Altera_Forum]

@DaveHorne 

Thank you very much for your help... but the topic I was searching for is described in: Cyclone 5 device handbook, catchwords are: SDRAM Controller Subsystem, Memory Protection.  Now I'm trying to figure out how to set up the protection rules ... unfortunately the documentation is not as good as expected - this often leads to trial and error developement :(  cheers guinea

[Altera_Forum]

Hi Guinea, I managed to create 2 partitions on the HPS SDRAM - 1 for the Linux operating system, the other for exclusive use by the FPGA. You can take a look at: https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/writing_to_hps_memory for an excellent tutorial on how to do this. The magic is in setting the bootloader argument as follows: 

  

• setenv mmcboot 'setenv bootargs console=ttyS0,115200 root=${mmcroot} rw rootwait mem=512M;bootz ${loadaddr} - ${fdtaddr}'  
• saveenv 

  The above partitions 512MB of the SDRAM for Linux usage. The other 512MB is free for the FPGA to use and starts at address 0x3000_0000 for the Cyclone V SOC. Hope this helps! :)