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Dear community,
What is the maximum capacitive load that a Cyclone V IO can drive? I know the IOs have a capacitance of 6 pF when used as input, but I couldn't find information about the maximum capacitive load that you can attach to an IO. Thanks. Cheers, Adam- Tags:
- Cyclone® V FPGAs
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Hi Adam -
There is no hard limit, but the more load capacitance the slower the output signal will transition. If you're in no hurry you can put as much load capacitance out there as you like. For some interfaces, like I2C, the standard specifies a maximum total bus capacitance in order to operate at the specified speed. But even then, if you slow down there is no limit on bus capacitance. What are you trying to do?- Mark as New
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--- Quote Start --- Hi Adam - There is no hard limit, but the more load capacitance the slower the output signal will transition. If you're in no hurry you can put as much load capacitance out there as you like. For some interfaces, like I2C, the standard specifies a maximum total bus capacitance in order to operate at the specified speed. But even then, if you slow down there is no limit on bus capacitance. What are you trying to do? --- Quote End --- I want to use TVS diode arrays to protect the IO pins of my Cyclone V from ESD. The application of the IOs is pretty general, as the overall board will be an FPGA control board. The maximum frequency of the IOs is around 100 MHz. What maximum capacitance can I drive at 100 MHz? The diode arrays I've taken into consideration have a capacitance ranging from 5 pF to 15 pF. Thanks! Cheers, Adam
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100MHz is fast for external I/O. With an external interface you have not only the internal capacitance to deal with (including your I/O protection and connector), but also the external connector and cable or whatever is out there. 5-15pF may be no problem depending on what you're doing, but I would recommend speaking about your application with the vendor of your TVS array. In these days of on-line forums like this one people seem to turn to vendors for information much less frequently. They have resources to help you so go ahead and use them.
At the speeds you're talking about impedance control is going to be very important. Tread carefully! And good luck.- Mark as New
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Just to add on, you could also verify the IO driving capability by running signal integrity simulation ie IBIS model or Hspice model.

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