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same circuits and HDL for cyclone V and IV IO's. it works on cyclone IV, but can't work on Cyclone V for any peripherals, even I2C memory. I tried program the IO's for different voltage setting, but it does't work. using oscillator to see, seems the lower level(logical 0) is going up gradually along the transmit line .
The I/O ports are gong out directly from FPGA chip then be connected to an I2C chip or register chip.
any one can help?
Thanks
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Have you constrained your IO for your Cyclone V project? Have you check the report files? It sounds like the pins you are monitoring with your 'oscillator' (oscilloscope?) are unasigned and are probably floating.
Cheers,
Alex
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Hi, Thanks all
finally I found if I slow down the clock to 500KHz, It works normally, but in cyclone IV, it works well at 1.2MHz.
Thanks any way, I can bear the slow.

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