Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Cyclone V Power Rail VCCIO

Sahil_Honeywell
新規コントリビューター I
840件の閲覧回数

Hi, 

In my design I am using different power supplies and LDOs for the respective power rails of the cyclone V FPGA. My question is this, if I disable the VCCIO power rail, what would happen to the FPGA? 

When I did that in my design, the output of the LDO, which is typically 1.8V (that goes to the VCCIO) still measures 1.4V, even though the enable pin for the LDO is low. Is it possible that this 1.4V is coming from FPGA itself, as the power rails (VCore, Vccpgm, etc) are still energized. Please advise.

 

Thanks

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2 返答(返信)
AminT_Intel
従業員
798件の閲覧回数

Hello,

 

May I know what is LDO?

 

Thank you

AminT_Intel
従業員
684件の閲覧回数

 We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

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