Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20405 Discussions

Cyclone V SoC RSDS speed

Honored Contributor II

I'm beginning an application that requires RSDS output, and am finding information that leads to ambiguous conclusions. 


RSDS is specifically mentioned in the Cyclone V High-Speed I/O Specifications; Table 34 of CV-51002 (2018.05.07). It states,  

"the cyclone v devices support the following output standards using true lvds output buffer types on all i/o banks.• true rsds output standard with data rates of up to 360 mbps" 


RSDS allows for both 3-differential-pair and 4-differential pair configurations (per National Semiconductor's RSDS specification). The 360Mbps spec, therefore, could mean three different things: 

1) 360Mbps per differential pair. 

2) 360Mbps total for a 3-differential-pair implementation of RSDS, implying 120Mbps per differential pair. 

3) 360Mbps total for a 4-differential-pair implementation of RSDS, implying 90Mbps per differential pair. 


How can I determine which one applies?
0 Kudos
1 Reply


The spec is per output lane, your #1 item. How many lanes will depend upon the targeted column driver your are connecting to. Note also there are different specs if using TX (True), or eTX (emulated) and also for different resistors / termination connections.


John G

0 Kudos