I'm currently working on an FPGA development/test board design with banks 4A, 5A and 5B connected to pin headers. Bank 3B is connected to Cypress FX3 and will be using 2.5V VCCIO/VCCPD. I'm planning to design the pin headers with variable VCCIO, so VCCIO will be provided by specific pin on each pin header for each bank separately. I know that Bank 4A has shared VCCPD with Bank 3B so it is fixed to 2.5V. Thus VCCIO of Bank 4A should be below or equal 2.5V. What will happen when VCCIO of Bank 4A is connected accidentally with 3.3V Power Supply? Will this break the FPGA? I know that this won't work, but am I required to take measures to protect the circuit in case of someone accidentally provides a VCCIO voltage higher than VCCPD of 2.5V? I did not found any "absolute maximum" requirement of VCCIO relative to VCCPD in the datasheet or handbook of Cyclone V devices.
--- Quote Start --- I know that this won't work --- Quote End --- Depending on what you're expecting of the FPGA, I suspect you'll find it will work, despite the very clear "VCCPD must be 3.3 V when VCCIO is 3.3 V" The absolute maximum ratings in the datasheet determine whether you will break the FPGA or not. In short - you shouldn't break it. --- Quote Start --- am I required to take measures to protect the circuit --- Quote End --- I would. Some resistors and a protection diode - to limit the voltage connected to bank 4A VCCIO - should be enough. Cheers, Alex