Cyclone V bit reversal on Tx PMA

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

Cyclone V bit reversal on Tx PMA

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Hi everyone,

I'm trying to use a generic transceiver PHY to use with a custom JESD204B core. For JESD204B I need to send MSB first in the serial stream but the transceiver only allows me to send LSB first.

I've seen that there is an option in the transceiver to reverse the bit order at the PMA but, after reading the documentation it's not clear where or how to do it. It mentions that it can only be done via de xcvr reconfiguration controller but still I can't find the register to write to.

Can anyone help me out? Just point me to the right piece of documentation :)

Thanks in advance.

Edit---

Nevermind, the 8B/10B decoder does the bit reversal since the encoded "a" bit (MSB in the 10B word) comes out first. Sorry for the missunderstanding

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