Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Unexpected H2F-LW AXI Activity

Honored Contributor II



I'm experiencing unexpected behavior on the H2F-LW AXI bus for the Arria 10 SoC SoM Dev-Kit (Achilles). 


I basically have a HPS-only example that includes DDR4, H2F-LW AXI port and a PIO-LED (output only) Qsys component connected to the LW port. This setup works as expected and I can toggle the LED(s) from Linux running on the SoC using the "/dev/mem" device interface. 


The problem occurs when I add the SPI (3-wire) Qsys component to the H2F-LW AXI bus. In this case, the PIO-LED continues to behaves as expected, but I also observe unexpected activity from the SPI-SCLK signal. After debugging further, I observed write assertions on the Avalon-MM bus in the SPI Qsys component. I attempted several modifications such as changing the base address, but nothing seemed to help. I'm not observing this behavior on the PIO component. 


Any ideas? Thanks!
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