Cyclone V flashing LEDs and clock (Verilog)

[Altera_Forum]

Hello everyone and really nice and glad to meet all of you, 

i am new to FPGA programming (i am a software developer which found this world of FPGA REALLY interesting to learn) and i wanted to ask a 'dummy' type of question. I am trying (using Verilog) to flash the LED on my board (Terasic Cyclone V GX Starter Kit) and i am using a counter in my design in order to perform the clock down. From my understanding up to now this board has a 50MHz clock which you can clock up or down using a PLL. Since i don't know how to use the PLL in order to clock down i have used a counter...if i wanted to use the PLL but i didn't wanted to use a Quartus MegaFunction is there any other way to synthesize the PLL?  I am sorry if my question sounds dummy but my previous experience on this hobby of mine was on Arduino and ARM boards go easy one me. :)  Best regards and thank you so much in advance.

[Altera_Forum]

You're doing the right thing - dividing down the clock with a counter. 

--- Quote Start ---  if i wanted to use the PLL but i didn't wanted to use a Quartus MegaFunction  --- Quote End ---  If you want to instantiate a PLL I strongly recommend you use the MegaFunction/MegaCore Wizards. You can instantiate them in other ways. However, with little/no experience you should use the tools that are there to prevent you making mistakes.  Note: in Cyclone V the lowest frequency you can generate from the PLL is 5MHz. So, to flash that LED - in a manner in which you can see it flashing - you will still need the counter.  Cheers, Alex

[Altera_Forum]

--- Quote Start ---  You're doing the right thing - dividing down the clock with a counter.If you want to instantiate a PLL I strongly recommend you use the MegaFunction/MegaCore Wizards. You can instantiate them in other ways. However, with little/no experience you should use the tools that are there to prevent you making mistakes.  Note: in Cyclone V the lowest frequency you can generate from the PLL is 5MHz. So, to flash that LED - in a manner in which you can see it flashing - you will still need the counter.  Cheers, Alex  --- Quote End ---    Dear Alex good evening,  thank you so much for your reply on my posting. I am trying to get the hang of this thing! Of course there are like 1 billion more things for me to learn but i am really trying my best here! I will use the MegaFunctions provided by the Quartus software. I only hope that i can understand of the generated code for the PLL and not to fry my brain completely !!! :D  But on a layman's language the autogenerated PLL from the MegaFunction is been created in Verilog or VHDL? Or some other "arcane" way? Is there any way to read the design created by the MegaFunction?  Best regards and thank you so much, Panos.

[Altera_Forum]

I wouldn't try and "read" the code, or other files, generated by the MegaWizard. You only need to know how to put it to use - how to instantiate it in your design. By all means look through the generated files, they're all text files. In several you will find settings for all the parameters you set via the wizard. However, you don't need to necessarily understand them. 

 Verilog or VHDL - match this to the language you're capturing your design in. Or, are you capturing it as a schematic in Quartus? In which case, on the last 'Summary' tab or the MegaWizard for the PLL, you need to check the *.bsf check box to ensure the appropriate symbol file is generated for you to use in your schematic.  Cheers, Alex

[Altera_Forum]

--- Quote Start ---  I wouldn't try and "read" the code, or other files, generated by the MegaWizard. You only need to know how to put it to use - how to instantiate it in your design. By all means look through the generated files, they're all text files. In several you will find settings for all the parameters you set via the wizard. However, you don't need to necessarily understand them.  Verilog or VHDL - match this to the language you're capturing your design in. Or, are you capturing it as a schematic in Quartus? In which case, on the last 'Summary' tab or the MegaWizard for the PLL, you need to check the *.bsf check box to ensure the appropriate symbol file is generated for you to use in your schematic.  Cheers, Alex  --- Quote End ---    Dear Alex good afternoon,  thank you so much for getting back to me on this one. I understand what you mean and i am 100% sure that i am not going to understand anything (with my current knowledge level) from the PLL's auto-generated code but...you know...as a complete no00b i feel really curious to see as much as i can see. :D  Actually i am not capturing it as schematic in Quartus. I am trying to write as much code as possible in order to get the hang of it. :)  Best regards, Panos.