Cyclone10 LP Custom PCB IO Pins Always HIGH issue

[Khaled_]

Hello,

I've designed a custom PCB around the 10CL006YE144 FPGA part. And now I'm having a hard time getting it to work. It does respond to the JTAG and I can upload any code to it via JTAG and it does complete successfully. However, all the time the IO pins of the FPGA are driven HIGH.

Literally all the time. Even while holding the nConfig button low, and after the config DONE LED comes up, all the pins are still HIGH.

I tried multiple verilog examples to test the life of various elements of the board, but nothing seems to work as all the IO pins are always HIGH no matter what.

Here are some things that I've made in the design and tested after receiving the PCB:

• Power supplies are working properly (1.2v, 2.5v, 3.3v)
• All VCCIO pins are 3.3v
• All VDDA pins are 2.5v
• All VCCINT pins are 1.2v
• All VCCPLL pins are 1.2v
• All GND pins + EPAD are properly grounded
• MSEL[2:0] pins are: 101 (for external flash config, using JTAG should bypass these in case they're wrong)
• DONE pin is behaving well as well as the nSTATUS pin
• nCE pin is LOW
• W25Q64 SPI Flash is correctly connected to the FPGA, I could flash it successfully through JTAG indirect configuration file method. It completes flashing the bitstream to the SPI flash successfully. Surprisingly, flashing any code to the SPI flash does bring the FPGA pins LOW/Floating. Doing a reset after that will reconfigure the FPGA chip and all the pins will go HIGH which is driving me mad.

All attempts to upload any code through JTAG or to the SPI FLASH are successfully completed but the FPGA is doing nothing of these HDL bitstreams. It's frozen in a HIGH output state on all pins forever.

Only the SPI Flashing process puts the FPGA into a state where all IO pins are floating. Then any power recycle or nConfig button reset will bring it back to the all-High outputs freezing state.

Doing power recycle while holding the nConfig button LOW results in all FPGA pins being HIGH even before config starts. When i release the nConfig button, the config DONE LED lights ON, and all the FPGA IO pins are still HIGH forever.

Please, let me know if you need any further information to clarify the situation. And I hope you can point me somewhere to look at.

Edit1: Here is the schematic of this board: it's an RP2040+10CL006 dev board for experimenting with SPI and custom bus linking between the MCU and the FPGA. Please, excuse me for using that awkward FPGA symbol that makes it harder to read the schematic!

https://drive.google.com/file/d/1CQ0V5mABqt6elKJ5Ppa0zD7VLpTavU6X/view?usp=sharing 

[sstrell]

What design are you using to test this?  Some code might be helpful.

What do you have the unused pins set to in the Device & Pin options?

Are you saying that every single GPIO pin is stuck high after programming?

[Khaled_ · Accepted solution]

I'm just writing 1's and 0's to my onboard 8 LEDs. Which are all HIGH all the time no matter what I write to them.  And here is my simple demo project

https://drive.google.com/file/d/15RSc9Cn_l2P2X5Fk2Q2P3KgyZQhG_02b/view?usp=sharing

The unused pins are "input tri-stated" in the device configurations.

Doing power recycle while holding the nConfig button LOW results in all FPGA pins are HIGH even before config starts. When i release the nConfig button, the config DONE LED lights ON, and all the FPGA IO pins are still HIGH same as before.

[EvanForney]

How is everything going? Have you started it?