CycloneII I/O pin damage (Short to VCC)

[Altera_Forum]

Hi, 

History: 

1. I am using EP2C5T144C6N. 
2. The pin 92 of this device is being damaged often (10%). 
3. The FPGA is 3.3 for I/O and 1.2 for internal. This pin (92) is connected to another device (3 volt). 
4. The 3 volt supply is up before the 3.3 volt supply. Data sheet says it is OK. 
5. Pin 92 is defaulted in the FPGA, and is not being programmed to anything (don't ask me why....it is a long story). 

  I have two questions: 1. Where can I send theses FPGAs for analysis to find out what is causing this damage? 2. Any idea what might be causing this? These two devices also have different ground which are tied at Chassis.  Regards, Mohsen

[Altera_Forum]

Answers: 

1) You'll have to look to your local Altera distributor for help if you wish to return the parts and have them analysed. However, don't expect them to identify what is causing the damage - they will only be able to identify what sort of damage has occurred: e.g. static damage, over current damage...    --- Quote Start ---  These two devices also have different ground which are tied at Chassis  --- Quote End ---   2) This doesn't sound helpful! I'd suggest that this arrangement is resulting in excessive voltage being applied to pin 92 when the system is being powered on. This is by no means an absolute answer but without more info it's very difficult to say.  Cheers, Alex

[Altera_Forum]

Simplest solution is just to disconnect pin 92 - cut the track if you don't want to design a new board.

[Altera_Forum]

One thing to take note is that even though you are interfacing 3.3V with 3V, you might want to ensure that no overshoot or undershoot which could be due to reflection that over the max input limit of the IO pin.