We are using PLL of CycloneV device.
Could you tell me about our followin question?
We use CycloneV GX 5CGXFC7D7F27C8N
We want to use four PLL's from a specific pin.
However, QUARTUS reported that only two FIT could be done.
Is this a constraint?
If it is a constraint, please tell me the corresponding document.
cv_5v2.pdf , cv_52004.pdf , 5cgxfc7.xls
What we want to do
1st : CLK4p,CLK4n (Differential) to PLL1
2nd : CLK5p,CLK5n (Differential) to PLL2
3rd : CLK6p,CLK6n (Differential) to PLL3
4th : CLK7p,CLK7n (Differential) to PLL4
K25(CLK4p) , K26(CLK4n)
N20(CLK5p) , M21(CLK5n)
R20(CLK6p) , P20(CLK6n)
T21(CLK7p) , T22(CLK7n)
Error screenshot is attached.