Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

DDC using Qsys

Altera_Forum
Honored Contributor II
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Hello!I want to make digital down converter on Cyclon V (Quartus 14). 

DDC is a blackbox with cic and fir filters, nco and two muls. Input signal width - 16 bits. 

First, I joined some IP cores: nco, mul, cic and fir filters and simulated it in modelSim in Quartus. 

 

I want to control DDC and receive data from DDC via SPI. Qsys containe SPI core, so I decided to make ddc in Qsys, but CIC filter and nco doesn't supported for Cyclone V.  

Is it a mistake or I do something wrong?  

Please advice me the best way to do this task.
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Altera_Forum
Honored Contributor II
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I don't think you are doing anything wrong, for some reason that IP is coded to tell Qsys it's not supported. I looked at the NCO documentation and it doesn't list Cyclone V as a supported device but on the next page resource usage targetting a Cyclone V device is listed so I'm not sure if it not being supported is a mistake. I recommend opening a service request since if this is a bug the support team might be able to should you how to work around the issue.

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Altera_Forum
Honored Contributor II
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I've downloaded Quartus 14.1 and find all components except multiplier(

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Altera_Forum
Honored Contributor II
811 Views

where does multiplier locate in qsys?

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