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DDR SDRAM connection to FPGA

Altera_Forum
Honored Contributor II
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Hi, 

 

I'm trying to design a board for EP3C16Q240C8N FPGA and MT46V16M16P DDR SDRAM. I have read some application notes which say that I have to connect SDRAM data lines to DQ/DQS blocks. My selected FPGA has 4 blocks of x8 DQ/DQS pins, but they are placed each on other side and bank of chip. So my question is - is it OK, to connect SDRAM data pins to two x8 DQ/DQS blocks which are placed on different sides? 

Thanks! 

 

 

Janis
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Altera_Forum
Honored Contributor II
336 Views

Yes, it is OK to do so. 

Beware that you only can connect the DM pins on the Top and Bottom bank.
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Altera_Forum
Honored Contributor II
336 Views

Thanks josyb!

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