DDR2 Calibration fails with ATLMEMPHY example driver in Cyclone IVE - even simulation

Programmable Devices

CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers

DDR2 Calibration fails with ATLMEMPHY example driver in Cyclone IVE - even simulation

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Example driver does not pass calibration in hardware, running at 125Mhz. Calibration fails goes high and local_init_ready never get asserted.

So, I simulated in Modelsim, with both "Quick Calibration" and "Skip Calibration". PLL does get locked at 125Mhz, but the simulation keeps running - all night long. It reached 12ms after running for 14 hours. Test Complete never goes high

Please see attached for "Skip Calibration". There is small blip of activity on DQ/DQS in the beginning (writing 0s and 1s), and then they go tristate for the rest. What is it waiting for?

Does this give anybody any clue? I must be something very basic

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