DE0 SDRAM memory

[Altera_Forum]

Hello,  

 I have a doubt about the connection between de Cyclone III and the SDRAM A3V64S40ETP in my DE0 board. In the datasheet of the SDRAM we have 12 inputs addresses (A0-A11) while in the datasheet of the DE0 pin connections there are 13 addresses specified (A0-A12) between the FPGA and the memory. Which is the reason of this since the SRAM only have 12 inputs!  Thank you

[Altera_Forum]

the RAM is probably available in a larger density, so the route was made to the MSB in case you or the vendor wants to upgrade the memory chip

[Altera_Forum]

Thank you for your prompt response! 

 Josep