Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20638 Discussions

DE0 board testing with adc interface

Altera_Forum
Honored Contributor II
1,065 Views

I want to flash a code through quartus II v 13.1. The DE0 prototype board i am using has cyclone III FPGA. my host machine has windows 10. the quartu II 13.1 has a USB drive not supported by windows 10. Also in the DE0 board handbook it says I must install NIOS II EDS which again is not available for windows 10/7, 64 bit. On powering up the board, i can see the seven segment counter running, but even when i use a windows 7 laptop, still the code is not getting flashed onto the cyclone III on the board. The quartus does not show any error while flashing the code and it says programmed successfully but there's no change in the output before and after flashing the code. I am trying to test the interface between the fpga and an ADC that I am using for which the FPGA should generate and ADC clock of 2 MHZ. Although quartus says that the programming is successful still the outputs of the FPGA pre and post flashing do not change. Plz tell me how to go about it.

0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
355 Views

Hi RaafReen, 

 

You can run a simulation and see if the functionality of your code is correct. 

 

 

Thanks. 

Best regards, 

KhaiQ 

(This message was posted on behalf of Intel Corporation)
0 Kudos
Reply