Hi,Can we set some selected FPGA pins default value to some defined state(1,0 or high impedance) during configuration cycle? Regards, Sanju
"During configuration" means before the configuration has been loaded and executed. Respectively the configuration file can't set the state of any IO pin in this phase. The state during configuration is determined by the FPGA hardware. If it has no features to set the IO state specifically, you get the fixed default behavior only.